SNUG: Synopsys Users Group - India 2006 Trip Report

SNUG India 2006
Trip Report

SNUG India took place on May 25-26 in Bangalore, India. The conference, which drew 1087 design engineers, set an attendance record for an electronic design automation (EDA) user’s conference in the Asia Pacific region and is emerging as the leading engineering conference there.

“SNUG is growing in both size and technical depth to reflect the growing numbers of designers in India working as part of global design teams that develop some of the most sophisticated chips and systems in the world,” said Ravi Srinivasan, director of Engineering-Methodology for Open-Silicon and a key member of the Technical Committee. “The selection process has improved the quality of papers.”

SNUG India’s program included two keynotes, 27 user presentations and 11 tutorials. In addition, two special panel discussions focused on low power design challenges and solutions and real-world successes with Synopsys’ IC Compiler (shown in photo at left).

Aart de Geus gave the opening keynote, “Partnerships for Predictable Success,” to an enthusiastic audience of nearly 1000 users. Proceeding Aart was the customer keynote, in which Nagendra Cherukupalli of Cypress Semiconductor addressed the crowd with his speech on "Designing Winning Products".

Nagendra Cherukupalli is shown receiving a gift from Aart de Geus in the photo at left.

The remainder of the day was focused on the 27 user presentations, where users got a chance to hear from their peers on such topics as IP, Hercules and 65nm, to name a few. Day one concluded with a panel discussion on low power, user paper awards and a cocktail evening event.

Congratulations go out to these users for winning awards at SNUG:

Best Verification Paper:
Siddesh Math, Qualcomm
Hitting Bugs through Assertions in Memory Controller
(photo at left)
Best Synthesis and Test Paper:
Srinivasulu Alampally, Jais Abraham, Texas Instruments Pvt. Ltd.
A Novel Method to Reduce Test Time Using DFT Compiler Max

Best Physical Design and Sign-Off Paper: (tie)
Vivek Nautiyal and Ashock Mistra ARM Ltd. Design of Ultra Low Power SRAM
and
Prashant Soraiyur and Vivek Seth, Texas Instruments Pvt. Ltd.
Evaluating the Accuracy and Requirements of a Signoff Crosstalk Noise Analysis Tool

The record crowd came back on day two to take in a broad range of topics delivered by Synopsys experts. Eleven tutorials, the ICC panel discussion along with a verification seminar kept attendees engaged and enthusiastic until the very end.

SNUG India 2006 presentations may be viewed online at:
SNUG India Proceedings

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